SEMI G79-0200 SPECIFICATION FOR OVERALL DIGITAL TIMING.pdf

S E M
SEM G79-0200
SPECIFICATON FOR OVERALL DGITAL TIMING ACCURACY
This spccification was technically approvcd by the Global Automatcd Test Equipmcnt Commiulcc and is the
dircct responsibility of the North Amcrican Automated Test Equipmcnl Commiiicc Current edition approved
by the North American Regional Standards Committee on September 3, 1999. Initially available on SEMI
Onlinc Novcmbcr 1999; to be published Fcbruary 2000
1 Purpose
5 Terminology
1. 1 This standard is intended to provide a minimum 5.1 Abbreviations and Acronyms
common definition of timing accuracy specifications
for automatic semiconductor test equipment (ATE
5. 1.1 41l-automatic test equipment
5.1.2 1ut-device under test
2 Scope
5.1.3 NR -non-return signal format
2.1 The scope of this standard includes all semicon
ductor ATE capable of digital functional testing. This
5.1.4R/x
eturn to zero, one or complement sigr
standard does not include the following
format
test fixturing errors
5 SBX-surround by zero, one or complement
signal format
device insertion errors. and
5.1.6 Z-driver off(high impedance
ATE performance or capability beyond timin
5.2 Definitions
accuracy
standard's overall timing accuracy(OTA
5.2.1 device insertion errors -error influenced by
device-input capacitance and/or terminations
definition serves to simplify automatic test equipment
comparisons and reduce specification ambiguity
5.2.2 edge-time delay created by an ATE delay
2.3 This standard does not purport to address safety
generation resource
issues, if any, associated with its use. It is the responsi
5.2.3 perf(
board-printed circuit board used
bility of the users of this standard to establish appro-to interface the tester channels to the device under test
priate safety and health practices and determine the
applicability of regulatory limitations prior to use
5.2.4 pin-tester channel
5.2.5 reference load A-500 ohms in parallel with
3 Limitations
3.1 Parameters associated with the following items are 5.2.6 reference load B-50 ohms to ground
not covered by the Overall Digital Timing Accurac
Specification
5. 2.7 reference load C
minimum driver pulse width
50 ohms to low (for driver z to high and high to z
transitions
comparator bandwidth
50 ohms to high(for driver z to low and low to z
1O round trip delay
transitions)
test fixturing errors
5.2.8 strobe compare-monitor DUT output at a
single time point
device insertion errors
5.2.9 test cy
cle- inverse of test pattern execution
time measurement unit accuracy, and
frequency
ATE capability or performance beyond timing 5.2.10 test fixturing errors -error in fluenced by
accuracy
mismatched signal path lengths, impedance discontinu
ities, lumped capacitance/inductance elements, and high
4 Referenced Standards
frequency loss due to skin effect or interconnects.
None
2. 11 window compare-monitor DUT continuously
during a time interval
SEMIG79-0200O SEM 2000